1. Field of the Invention
The invention relates to a control device, more particularly to a control device for an interleaving power factor corrector.
2. Description of the Related Art
Referring to FIG. 1, a conventional interleaving power factor corrector 900 is shown to include first and second control modules 910, 920, first and second power switches 930, 940, and an interleaving circuit 950. The first control module 910 outputs a first control signal (VD1) based on a current (IL1) flowing through an inductor (L1) such that the first power switch 930 is operable between an ON-mode and an OFF-mode in response to the first control signal (VD1) from the first control module 910. When the first control module 910 detects that the current (IL1) is zero, the first control signal (VD1) outputted by the first control module 910 has a high level such that the first power switch 930 is switched to the ON-mode. The second control module 920 outputs a second control signal (VD2) based on a current (IL2) flowing through an inductor (L2) such that the second power switch 940 is operable between an ON-mode and an OFF-mode in response to the second control signal (VD2) from the second control module 920. When the second control module 920 detects that the current (IL2) is zero, the second control signal (VD2) outputted by the second control module 920 has a high level such that the second power switch 930 is switched to the ON-mode. The first and second control modules 910, 920 are controlled by the interleaving circuit 950 so that the first and second control signals (VD1, VD2) outputted respectively thereby have a phase difference of T/2 therebetween, i.e., 180°, where T is a cycle period of the current (IL1), as shown in FIG. 2a. 
Referring to FIGS. 2a to 2e, FIG. 2a illustrates waveforms of the currents (IL1, IL2), wherein S1 and S2 represent respectively the current (IL1, IL2) in an ideal condition, S3 represents the current (IL2) having a lead zero point, and S4 represent the current (IL2) having a lag zero point. FIG. 2b illustrates a waveform of the first control signal (VD1) corresponding to S1 of FIG. 2a. FIG. 2c illustrates a waveform of the second control signal (VD2) corresponding to S2 of FIG. 2a. FIGS. 2d and 2e illustrate waveforms of the second control signal (VD2) corresponding respectively to S3 and S4 of FIG. 2a. S1 of FIG. 2a indicates that the current (IL2) has a zero point at t0 in the ideal condition. However, the zero point of the current (IL2) may drift as a result of external interference. For example, S3 of FIG. 2a indicates that the current (IL2) has a lead zero point at t2, and S4 of FIG. 2a indicates that the current (IL2) has a lag zero point at t1. Therefore, drift of the zero point of the current (IL2) incurs apparent variation of the duty cycle of the second control signal (VD2), as shown in FIG. 2d, or the diverged duty cycle of the second control signal (VD2), as shown in Figure and 2e. Therefore, the conventional interleaving power factor corrector 900 cannot provide a stable voltage output to the load.